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AI Tech Flash ── 2026-10-25

Nvidia Shows CPO Prototype and Plans 30x Capacity

Nvidia plans to raise CPO optical-engine capacity 30x by end of 2028

What changes

According to Crypto Briefing, links inside AI data centers are moving from copper to light. Co-packaged optics (CPO) places the parts that convert electrical signals to light right next to the switch chip.

The outlet says CPO shortens the distance signals travel and improves power efficiency and signal quality. It reports that Nvidia CEO Jensen Huang said demand for optical components in AI data centers could rise 15 times.

Why it matters

According to Crypto Briefing, larger AI models make the wiring between chips a bottleneck. It says copper is reaching physical limits in power consumption, signal degradation and bandwidth density.

The outlet says the obstacle to CPO has been the ability to build optical engines at scale, not demand. The new plan targets that capacity. Crypto Briefing describes Huang's 15x figure as what Nvidia believes its own roadmap requires, rather than a forecast of an abstract market.

What it is

CPO integrates optical engines directly alongside the switch chip, instead of attaching optical transceivers externally. An optical engine is the part that converts between electrical and optical signals.

According to Digitimes, Nvidia unveiled a prototype of its next-generation CPO technology, Optics-on-Interposer (OOI), at SEMICON West 2026. The articles available here give no further detail on how OOI works.

Who and where

According to Crypto Briefing, Nvidia is working with packaging partner Siliconware Precision Industries (SPIL) to expand optical-engine capacity. The flagship product is the Spectrum-6 CPO switch, built for what Nvidia calls its Vera Rubin AI factories.

The outlet also reports that Amkor plans to grow interposer wafer capacity by over 300% by the end of 2028. An interposer is a substrate that lets multiple chips connect at high speed within one package.

Why it was built

According to Crypto Briefing, AI training clusters tightly link thousands of accelerators. That makes power use and signal loss in the wiring a serious problem.

The outlet says optical interconnects, which use light, sidestep many of copper's limits. CPO moves that optical link closer to the chip.

How it works

Traditionally, a separate optical transceiver attaches to the outside of the switch chip. With CPO, the optical engine sits beside the switch silicon.

Crypto Briefing says this shortens the electrical path between chip and fiber, cutting latency and improving power efficiency and signal quality. It reports that Spectrum-6 promises higher bandwidth density and lower energy use than existing gear. Those are Nvidia's claims, and the outlet gives no figures.

Key points

  1. According to Crypto Briefing, Nvidia and SPIL plan to expand CPO optical-engine capacity 15x by mid-2027 and 30x by the end of 2028.
  2. According to Digitimes, Nvidia unveiled a prototype of its Optics-on-Interposer (OOI) CPO technology at SEMICON West 2026.
  3. According to Crypto Briefing, the Spectrum-6 CPO switch is the flagship product for Vera Rubin AI factories.

Conclusion

Nvidia showed a CPO prototype and a large capacity plan at the same time. The figures come from Crypto Briefing's report of Huang's remarks and the plan. The articles do not give OOI details or measured performance.

Quotes and sources

“Nvidia has unveiled a prototype of its next-generation co-packaged optics (CPO) technology, Optics-on-Interposer (OOI), at SEMICON West 2026”
── Digitimes, 2026-10-25
“Nvidia, working with packaging partner Siliconware Precision Industries, plans to expand co-packaged optics optical-engine capacity by 15 times by mid-2027.”
── Crypto Briefing, 2026-10-25
“Rather than connecting optical transceivers externally to a switch chip, CPO integrates the optical engines directly alongside the silicon, cutting the distance signals need to travel and improving both power efficiency and signal integrity in the process.”
── Crypto Briefing, 2026-10-25
“Interposers are the substrates that allow multiple chiplets or dies to connect to each other at high speed within a single package.”
── Crypto Briefing, 2026-10-25

Source articles

Written by AI (Claude) from the cited articles, then checked by Jev (TypeSafe's judgement model), a Gemini fact-check and a verbatim check of every quote.